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[VHDL-FPGA-Verilog] dw8051-used-in-FPGA

Description: 自己下载的dw8051核，并在atlys fpga开发板上运行成功。其中rom和ram都已经生成，4个并行I/O口也有。编程语言是verilog。另外，还有hex转in文件的小软件，以及Uedit这个文本编辑器，它是用来给dw8051的rom载入程序的。-The the dw8051 nuclear, download and run atlys fpga development board. Rom and ram have been generated, there are four parallel I/O port. The programming language is verilog. In addition, there are small software to the hex turn in documents, and Uedit text editor, it is used to dw8051 rom loaded program.
Platform: | Size: 29199360 | Author: ayading826 | Hits:

[VHDL-FPGA-Verilog] rom_coe

Description: 这是一个用verilog编写的用rom核控制led显示的左移右移，并有按键控制-This is written in verilog rom nuclear control led left shift right shift, and key control
Platform: | Size: 308224 | Author: Li | Hits:

[VHDL-FPGA-Verilog] LAB-1

Description: 用组合电路实现的ROM,编程环境为QUARTUS II，verilog编写的例程。-The combinational circuit ROM programming environment QUARTUS II, verilog written routines.
Platform: | Size: 223232 | Author: 李娟 | Hits:

[VHDL-FPGA-Verilog] RTL

Description: verilog编写的关于使用MENTOR的MBISTArchitect进行momery的自测试代码，包含测试算法模型，SRAM,ROM模型-verilog prepared by the use of MBISTArchitect for momery MENTOR self-test code, including test algorithm model, SRAM, ROM model
Platform: | Size: 305152 | Author: | Hits:

[VHDL-FPGA-Verilog] brom_16x8

Description: 使用Verilog语言编写的ROM读写程序,使用IP核,在Xilinx Spartan-6上运行通过,是很好的Verlog程序-ROM using Verilog language literacy program, the use of IP core in Xilinx Spartan-6 run through, is a very good program Verlog
Platform: | Size: 7168 | Author: 于洋 | Hits:

[VHDL-FPGA-Verilog] i2c_reader

Description: 一个采用IIC协议，从ROM里面读数据的接口程序，采用verilog语言，状态机实现。-One with IIC protocol, which read data from ROM interface program, using verilog language, the state machine implementation.
Platform: | Size: 3072 | Author: why | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 将ROM的正弦波数据输入FIFO存储器，然后输出，有modelsim仿真波形-Verilog FIFO ROM mif sine
Platform: | Size: 6605824 | Author: xiadafang | Hits:

[VHDL-FPGA-Verilog] vga_pic

Description: 利用verilog编写的程序，并且实例化了一个rom，将mif文件初始化在rom中，可以实现在vga上显示图片。文字信息等，十分实用。-Use programs written in verilog, and instantiates a rom, rom the mif file initialization, you can achieve the vga display picture. Text information, very useful.
Platform: | Size: 1267712 | Author: 灵湖仙梦 | Hits:

[VHDL-FPGA-Verilog] DW8051

Description: verilog代码，51内核，是DW8051，8K ram 64K rom强大版本-verilog code, 51 cores, is DW8051, 8K ram 64K rom powerful version
Platform: | Size: 72704 | Author: 张文海 | Hits:

[VHDL-FPGA-Verilog] Puzzle

Description: 一个用verilog编写的VGA显示拼图游戏，本程序基于Xilinx的Basys2开发板，图像存储于ROM中-A VGA display jigsaw puzzle with verilog written, the program is based on the Basys2 Xilinx development boards, the image is stored in ROM
Platform: | Size: 11915264 | Author: Zic | Hits:

[VHDL-FPGA-Verilog] vga

Description: 用verilog设计控制程序从 ROM模块读取图片信息，然后写入 VGA接口。控制程序每隔250ms写入不同的信息至VGA接口，在屏幕上会出现小绿人的动画。-Reading the image information from the ROM module verilog design control procedures, and then write the VGA connector. Control program every 250ms write different messages to the VGA connector on the screen will appear little green men animated.
Platform: | Size: 3833856 | Author: xutao | Hits:

[VHDL-FPGA-Verilog] ROM_test

Description: 测试ROM的例子用Verilog写的，里面有测试文件，测试通过完全可用！-Examples of test ROM data
Platform: | Size: 169984 | Author: 苏春荣 | Hits:

[VHDL-FPGA-Verilog] SinGen

Description: 使用Verilog编写的正弦波生成工程，使用ROM核产生，利用mif文件-Written using Verilog sine wave generation projects using ROM nuclear generation, use mif file
Platform: | Size: 4097024 | Author: 杨玉 | Hits:

[Other] pud_ben

Description: Verilog HDL source code of generating a ROM file (in Quartuss) and testbench in Modelsim (verification)
Platform: | Size: 5120 | Author: Ben | Hits:

[VHDL-FPGA-Verilog] sin_quartus9.0

Description: 用Verilog实现不同相位的正弦波波形输出，使用到ROM查表方式，对不同相位的地址进行合成后查表得到不同相位的正弦波。-Implementation of Sine wave output with different phase.
Platform: | Size: 4234240 | Author: 俞少迪 | Hits:

[VHDL-FPGA-Verilog] fre_dev_v0.1

Description: 用verilog编写的频率可以控制的三角函数发生器,其中用matlab编写的sine表存入rom中-use verilog making the generator of sine and cosine
Platform: | Size: 21655552 | Author: 王鹤腾 | Hits:

[VHDL-FPGA-Verilog] sin_cos_module

Description: Verilog实现的cordic算法的计算sin，cos值得模块，使用rom，代码简洁有效。-Verilog implementation of the cordic algorithm of computing the sine and cosine worth module, use of ROM, the code is concise and effective.
Platform: | Size: 1024 | Author: 姚盛健 | Hits:

[VHDL-FPGA-Verilog] convert_to_v-master

Description: Tools for converting text and bitmaps into Verilog ROM files
Platform: | Size: 17408 | Author: 小海豚 | Hits:

[VHDL-FPGA-Verilog] DDS(ok)

Description: 制作ROM正弦表并填充FPGA内部ROM，通过调用内部数据实现正弦波输出，开发环境quartusii , 语言verilog , 调试通过 ， 附有modelsim调试结果。-Make ROM sine table and fill the ROM internal FPGA, by calling the internal data to achieve the sine wave output, development environment QuartusII, Language Verilog, debugging through, with Modelsim debugging results.
Platform: | Size: 10149888 | Author: PrudentMe | Hits:

[VHDL-FPGA-Verilog] AMBA

Description: AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型-AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave
Platform: | Size: 17408 | Author: zhch26 | Hits:
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